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Proceedings Paper

A novel spice model of photodetector for OEIC design
Author(s): Jiantao Bian; Xiang Cheng; Chao Chen
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Paper Abstract

Silicon monolithically Optoelectronic Integrated Circuit (OEIC) designed in standard CMOS process has been gradually applied. But Spice models of opticalelectronic devices such as photodetector can not be provided by IC manufactories in OEIC design. A novel Spice model of photodetector is introduced for compatible-design of OEIC in this paper. An N+/N-Well/P-Sub photodetector in standard CMOS process is described. The model of CMOS photodetector is completely based on Hspice EDA design software. It includes optical current, dark current, junction capacitor, series resistor, parallel resistor, and even noise characteristic. A four-terminal network structure is utilized to take the place of the photodetector in the model. The whole model can be easily applied to OEIC design as a subcircuit. At 780nm wavelength, the characteristics of the N+/N-Well/P-Sub photodiode fabricated in 0.5μm CMOS process are simulated with the Spice model and tested. With a reverse bias of 2.5V, the measured and simulated responsivity is both about 0.25A/W, which indicates the availability of the model. Finally, the compatible-design of OEIC used for optical pickup unit in optical storage system has been accomplished with the novel photodetector model.

Paper Details

Date Published: 3 March 2008
PDF: 8 pages
Proc. SPIE 6621, International Symposium on Photoelectronic Detection and Imaging 2007: Photoelectronic Imaging and Detection, 66211E (3 March 2008); doi: 10.1117/12.790834
Show Author Affiliations
Jiantao Bian, Jiangsu Polytechnic Univ. (China)
Xiamen Univ. (China)
Xiang Cheng, Xiamen Univ. (China)
Chao Chen, Xiamen Univ. (China)


Published in SPIE Proceedings Vol. 6621:
International Symposium on Photoelectronic Detection and Imaging 2007: Photoelectronic Imaging and Detection

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