Share Email Print
cover

Proceedings Paper

Nios II implementation in CCD camera for Pi of the Sky experiment
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array (FPGA) of the CCD camera for the "Pi of the Sky" experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware (VHDL) inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.

Paper Details

Date Published: 28 December 2007
PDF: 6 pages
Proc. SPIE 6937, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007, 693709 (28 December 2007); doi: 10.1117/12.784585
Show Author Affiliations
Maciej Kwiatkowski, Soltan Institute for Nuclear Studies (Poland)
Warsaw Univ. of Technology (Poland)
Grzegorz Kasprowicz, Warsaw Univ. of Technology (Poland)
Dominik Rybka, Soltan Institute for Nuclear Studies (Poland)
Warsaw Univ. of Technology (Poland)
Ryszard S. Romaniuk, Warsaw Univ. of Technology (Poland)
Krzysztof T. Pozniak, Warsaw Univ. of Technology (Poland)


Published in SPIE Proceedings Vol. 6937:
Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007

© SPIE. Terms of Use
Back to Top