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Proceedings Paper

The GPS code acquisition based on pipelined FFT processor
Author(s): Wei Li; Haibing Zhu; Jun Wang; Shaohong Li
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Paper Abstract

This paper describes one implementation of the long PN codes acquisition especially for GPS P(Y) code direct acquisition. The design method is based on the parallel method using the ultra long FFT (Fast Fourier Transform) based processing which searches over time uncertainty in parallel and frequency uncertainty serially. The FFT processor is based on R22SDF (single-path delay feedback) pipelined FFT architecture for its least memory use. The design was implemented with the FPGA device, and is tested and verified with the simulated GPS P code. The system can search in less than 60 seconds over 2.5 KHz of frequency uncertainty and 1 sec of time uncertainty with the work speed higher than 100MHz.

Paper Details

Date Published: 10 November 2007
PDF: 6 pages
Proc. SPIE 6795, Second International Conference on Space Information Technology, 67956D (10 November 2007); doi: 10.1117/12.775258
Show Author Affiliations
Wei Li, Beijing Univ. of Aeronautics and Astronautics (China)
Haibing Zhu, Southwest China Research Institute of Electronic Equipment (China)
Jun Wang, Beijing Univ. of Aeronautics and Astronautics (China)
Shaohong Li, Beijing Univ. of Aeronautics and Astronautics (China)


Published in SPIE Proceedings Vol. 6795:
Second International Conference on Space Information Technology

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