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Proceedings Paper

High throughput maskless lithography: low voltage versus high voltage
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Paper Abstract

The beam energy is a driving design parameter for electron beam lithography systems. To be able to compare the differences of low kV (5 kV) and high kV (100 kV) for a high-throughput system the limitations of both types of systems are evaluated. First the effect on the CD uniformity and throughput is analyzed. For any shot noise limited system the dose that is needed to obtain a required CD uniformity can be calculated. This dose depends on the total spot size and the efficiency of the electrons in the resist. For a smaller spot less dose is required than for a large spot. The current in a single beam is also determined by the spot size. A larger spot has more current. With these parameters an optimization of the required dose, spot size and single beam current can be made. It is found that although for high kV it is easier to create a small spot with a high current the low resist-exposure efficiency of the high-energy electrons limits the throughput, because the required dose is large. It is also found that for 10 wafers per hour multiple lenses or columns are required. For practical reasons (a high kV lens cannot be made as small as a low kV lens) there is a clear preference for the use of low energy in high-throughput systems. Another aspect that is crucial in the lithography process is the overlay. One of the main differences between high and low energy systems is the power that is dissipated in the wafer and the resulting error due to expansion. It is found that for both energies wafer heating is an issue, but for low kV there seem to be solutions, while for high kV the problem is 30 times bigger.

Paper Details

Date Published: 28 March 2008
PDF: 10 pages
Proc. SPIE 6921, Emerging Lithographic Technologies XII, 69211T (28 March 2008); doi: 10.1117/12.771971
Show Author Affiliations
S. W. H. K. Steenbrink, MAPPER Lithography B.V. (Netherlands)
B. J. Kampherbeek, MAPPER Lithography B.V. (Netherlands)
M. J. Wieland, MAPPER Lithography B.V. (Netherlands)
J. H. Chen, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
S. M. Chang, Taiwan Semiconductor Manufacturing Co. Ltd. (Taiwan)
M. Pas, Texas Instruments Inc. (United States)
J. Kretz, Qimonda Dresden GmbH & Co. OHG (Germany)
C. Hohle, Qimonda Dresden GmbH & Co. OHG (Germany)
D. van Steenwinckel, NXP Semiconductors (Belgium)
S. Manakli, STMicroelectronics (France)
J. Le-Denmat, STMicroelectronics (France)
L. Pain, CEA-LETI, Minatec (France)


Published in SPIE Proceedings Vol. 6921:
Emerging Lithographic Technologies XII
Frank M. Schellenberg, Editor(s)

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