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Proceedings Paper

MAPPER: high throughput maskless lithography
Author(s): E. Slot; M. J. Wieland; G. de Boer; P. Kruit; G. F. ten Berge; A. M. C. Houkes; R. Jager; T. van de Peut; J. J. M. Peijster; S. W. H. K. Steenbrink; T. F. Teepen; A. H. V. van Veen; B. J. Kampherbeek
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Paper Abstract

MAPPER Lithography is developing a maskless lithography technology. The technology combines massively-parallel electron-beam writing with high speed optical data transport used in the telecommunication industry. The electron optics generates 13,000 electron beams that are focused on the wafer by electrostatic lens arrays which are manufactured by using MEMS manufacturing techniques. Each beam has its own optical column to avoid a central cross-over. This secures high throughput (> 10 wafers per hour) at high resolution (< 45 nm half pitch). The 13,000 e-beams are generated by splitting up a single electron beam that originates from a single electron source and are finally accelerated to 5 kV to expose the resist on the wafer. The e-beams are arranged in such a way that they form a rectangular slit with a width of 26 mm, the same width of a field in an optical stepper. During exposure the e-beams are deflected over 2 μm perpendicular to the wafer stage movement. This means that with one scan of the wafer a full field of 26 mm x 33 mm can be exposed. During the simultaneous scanning of the wafer and deflection of the electron beams the beams are switched on and off by 13,000 light signals, one for each e-beam. The light beams are generated in a data system that contains the chip patterns in a bitmap format. This bitmap is divided over 13,000 data channels and streamed to the ebeams at 1-10 GHz. This paper will explain the design drivers behind the system and provide more detail on the current design. Finally, results of our technology Demonstrator are presented, showing the viability of MAPPER's concept.

Paper Details

Date Published: 3 April 2008
PDF: 9 pages
Proc. SPIE 6921, Emerging Lithographic Technologies XII, 69211P (3 April 2008); doi: 10.1117/12.771965
Show Author Affiliations
E. Slot, MAPPER Lithography B.V. (Netherlands)
M. J. Wieland, MAPPER Lithography B.V. (Netherlands)
G. de Boer, MAPPER Lithography B.V. (Netherlands)
P. Kruit, MAPPER Lithography B.V. (Netherlands)
Delft Univ. of Technology (Netherlands)
G. F. ten Berge, MAPPER Lithography B.V. (Netherlands)
A. M. C. Houkes, MAPPER Lithography B.V. (Netherlands)
R. Jager, MAPPER Lithography B.V. (Netherlands)
T. van de Peut, MAPPER Lithography B.V. (Netherlands)
J. J. M. Peijster, MAPPER Lithography B.V. (Netherlands)
S. W. H. K. Steenbrink, MAPPER Lithography B.V. (Netherlands)
T. F. Teepen, MAPPER Lithography B.V. (Netherlands)
A. H. V. van Veen, MAPPER Lithography B.V. (Netherlands)
B. J. Kampherbeek, MAPPER Lithography B.V. (Netherlands)

Published in SPIE Proceedings Vol. 6921:
Emerging Lithographic Technologies XII
Frank M. Schellenberg, Editor(s)

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