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Proceedings Paper

An extraction of repeating patterns from OPCed layout data
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Paper Abstract

As the feature size of LSI becomes smaller, the increase of mask manufacturing cost is becoming critical. Association of Super-Advanced Electronics Technologies (ASET) started a 4-year project aiming at the reduction of mask manufacturing cost and TAT by the optimization of MDP, mask writing, and mask inspection in 2006 under the sponsorship of New Energy and Industrial Technology Development Organization (NEDO) [1]. In the project, the optimization is being pursued from the viewpoints of "common data format", "pattern prioritization", "repeating patterns", and "parallel processing" in MDP, mask writing, and mask inspection. In the total optimization, "repeating patterns" are applied to the mask writing using character projection (CP) and efficient review in mask inspection. In this paper, we describe a new method to find repeating patterns from OPCed layout data after fracturing. We found that using the new method efficient extraction of repeating patterns even from OPCed layout data is possible and shot count of mask writing decreases greatly.

Paper Details

Date Published: 12 March 2008
PDF: 8 pages
Proc. SPIE 6925, Design for Manufacturability through Design-Process Integration II, 69250Y (12 March 2008); doi: 10.1117/12.771836
Show Author Affiliations
Yoshihiro Fujimoto, Association of Super-Advanced Electronics Technologies (Japan)
Masahiro Shoji, Association of Super-Advanced Electronics Technologies (Japan)
Kokoro Kato, Association of Super-Advanced Electronics Technologies (Japan)
Tadao Inoue, Association of Super-Advanced Electronics Technologies (Japan)
Masaki Yamabe, Association of Super-Advanced Electronics Technologies (Japan)


Published in SPIE Proceedings Vol. 6925:
Design for Manufacturability through Design-Process Integration II
Vivek K. Singh; Michael L. Rieger, Editor(s)

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