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Proceedings Paper

Predicting conversion time of circuit design file by artificial neural networks
Author(s): Sung-Hoon Jang; Jee-Hyong Lee; Byoung-Sup Ahn; Won-Tai Ki; Ji-Hyeon Choi; Sang-Gyun Woo; Han-Ku Cho
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Paper Abstract

GDSII is a data format of the circuit design file for producing semiconductor. GDSII is also used as a transfer format for fabricating photo mask as well. As design rules are getting smaller and RET (Resolution Enhancement Technology) is getting more complicated, the time of converting GDSII to a mask data format has been increased, which influences the period of mask production. Photo mask shops all over the world are widely using computer clusters which are connected through a network, that is, called distributed computing method, to reduce the converting time. Commonly computing resource for conversion is assigned based on the input file size. However, the result of experiments showed that the input file size was improper to predict the computing resource usage. In this paper, we propose the methodology of artificial intelligence with considering the properties of GDSII file to handle circuit design files more efficiently. The conversion time will be optimized by controlling the hardware resource for data conversion as long as the conversion time is predictable through analyzing the design data. Neural networks are used to predict the conversion time for this research. In this paper, the application of neural networks for the time prediction will be discussed and experimental results will be shown with comparing to statistical model based approaches.

Paper Details

Date Published: 4 March 2008
PDF: 8 pages
Proc. SPIE 6925, Design for Manufacturability through Design-Process Integration II, 69250W (4 March 2008); doi: 10.1117/12.771771
Show Author Affiliations
Sung-Hoon Jang, Samsung Electronics Co., Ltd. (South Korea)
Sungkyunkwan Univ. (South Korea)
Jee-Hyong Lee, Sungkyunkwan Univ. (South Korea)
Byoung-Sup Ahn, Samsung Electronics Co., Ltd. (South Korea)
Won-Tai Ki, Samsung Electronics Co., Ltd. (South Korea)
Ji-Hyeon Choi, Samsung Electronics Co., Ltd. (South Korea)
Sang-Gyun Woo, Samsung Electronics Co., Ltd. (South Korea)
Han-Ku Cho, Samsung Electronics Co., Ltd. (South Korea)


Published in SPIE Proceedings Vol. 6925:
Design for Manufacturability through Design-Process Integration II
Vivek K. Singh; Michael L. Rieger, Editor(s)

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