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Proceedings Paper

Rigorous CMP and electroplating simulations for DFM applications
Author(s): Yuri Granik; Norbert Strecker
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Paper Abstract

We present the chip-scale CMP simulator for layer uniformity analysis within Calibre DFM framework. The CMP simulator is intended to be used during smart fill optimizations, accurate parasitic extractions, defocus variability compensations, and other DFM applications. It is tightly integrated with Mentor Graphics DFM components for yield analysis and optimization. The paper discusses the key concepts of the electro-chemical copper deposition and slurry CMP models that are used in the simulation. The data flow is described, including the use of mask information from design layout data. Application examples, including the process flow and the simulated results, are presented. Both the electroplating and the CMP models include empirical parameters that describe the width- and space- dependency. Fast and accurate global optimization search algorithms are implemented to find optimum modeling parameter values.

Paper Details

Date Published: 12 March 2008
PDF: 5 pages
Proc. SPIE 6925, Design for Manufacturability through Design-Process Integration II, 692507 (12 March 2008); doi: 10.1117/12.771702
Show Author Affiliations
Yuri Granik, Mentor Graphics Corp. (United States)
Norbert Strecker, Mentor Graphics Corp. (United States)

Published in SPIE Proceedings Vol. 6925:
Design for Manufacturability through Design-Process Integration II
Vivek K. Singh; Michael L. Rieger, Editor(s)

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