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Proceedings Paper

An ultra-narrow FinFET poly-Si gate structure fabricated with 193nm photolithography and in-situ PR/BARC and TEOS hard mask etching
Author(s): Wen-Shiang Liao; Cheng-Han Wu; Mao-Chyuan Tang; Sheng-Yi Huang; Tommy Shih; Yue-Gie Liaw; Kun-Ming Chen; Tung-Hung Chen; Huan-Chiu Tsen; Lee Chung
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Paper Abstract

A vertical double gate MOSFET (FinFET) device with an ultra-small poly-Si gate of 30nm and promising device performances has been successfully developed after integrating a 14Å nitrided gate oxide on silicon-on-insulator (SOI) wafers. First, a 500Å-thick TEOS capping oxide layer was deposited upon a 1000Å-thick poly-Si gate layer. Second, both 1050Å-thick bottom anti-reflective coating (BARC) and 2650Å-thick photoresist (PR) were coated. A deep ultra-violet (DUV) 193nm wavelength ASML scanner lithography tool was used for the ultra-small poly-Si layout patterning under high energy exposure. After an organic-based trimming down plasma etching of both PR and BARC, the TEOS capping oxide layer was plasma etched in another oxide-based etching chambers without breaking the plasma etcher's loadlock vacuum. Then, without removing the already plasma patterned and trim-downed PR and BARC, an in-situ PR/BARC and TEOS hard mask etching was rendered for the final 1000Å-thick poly-Si gate electrode. The poly-Si etching can be automatically stopped by setting the over-time etching mode to a few seconds after detecting the endpoint signal of the bottom buried oxide (BOX) insulating layer. Finally, after PR and BARC plasma as well as additional wet cleaning, an ultra-narrow poly-Si gate electrode, i.e., after etching inspection (AEI) of 30nm, with its capping TEOS hard mask was successfully fabricated.

Paper Details

Date Published: 21 March 2008
PDF: 6 pages
Proc. SPIE 6921, Emerging Lithographic Technologies XII, 69212N (21 March 2008); doi: 10.1117/12.769591
Show Author Affiliations
Wen-Shiang Liao, United Microelectronics Corp. (Taiwan)
Cheng-Han Wu, United Microelectronics Corp. (Taiwan)
Mao-Chyuan Tang, United Microelectronics Corp. (Taiwan)
Sheng-Yi Huang, United Microelectronics Corp. (Taiwan)
Tommy Shih, United Microelectronics Corp. (Taiwan)
Yue-Gie Liaw, ASint Technology Corp. (United States)
Kun-Ming Chen, National Nano Device Labs. (United States)
Tung-Hung Chen, United Microelectronics Corp. (Taiwan)
Huan-Chiu Tsen, United Microelectronics Corp. (Taiwan)
Lee Chung, United Microelectronics Corp. (Taiwan)


Published in SPIE Proceedings Vol. 6921:
Emerging Lithographic Technologies XII
Frank M. Schellenberg, Editor(s)

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