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Proceedings Paper

Increasing the efficiency of p+np+ injection-avalanche Si CMOS LEDs (450nm – 750nm) by means of depletion layer profiling and reach-through techniques
Author(s): Lukas W. Snyman; Monuko du Plessis
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Paper Abstract

Modeling of p+np+ CMOS Si LED structures show that by utilizing a short linear increasing E-field in the p+n reverse biased junction with a gradient of approximately 5 × 105 V.cm-1. μm-1, and facing an injecting p+n junction, has the potential to enhance photonic emissions in the 2.2 and 2.8 eV (450-750nm ) regime. Latest new designs utilize reach-through techniques in p+np+ avalanche-injection control structures and p+np+ poly-Si gated structures and show positive realizations of this model. Areas in the devices show marked increases in emission efficiency of factors of up to 50 - 100 as compared to previous realizations utilizing no reach-through and injection techniques. The current devices operated in the 6-8V, 1uA - 2mA regime and emit at levels of up to ~10nW /μm2. The developed devices have been realized using standard 0.35 μm CMOS design rules and fabrication technology, and have particular technological significance for future all-silicon CMOS opto-elctronic circuits and systems. The current emission levels are about three orders higher than the low frequency detectability limit of CMOS p-i-n detectors of corresponding area.

Paper Details

Date Published: 26 February 2008
PDF: 12 pages
Proc. SPIE 6898, Silicon Photonics III, 68980E (26 February 2008); doi: 10.1117/12.760038
Show Author Affiliations
Lukas W. Snyman, Tshwane Univ. of Technology (South Africa)
Monuko du Plessis, Univ. of Pretoria (South Africa)


Published in SPIE Proceedings Vol. 6898:
Silicon Photonics III
Joel A. Kubby; Graham T. Reed, Editor(s)

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