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Proceedings Paper

SOI waveguide fabrication process development using star coupler scattering loss measurements
Author(s): K. P. Yap; J. Lapointe; B. Lamontagne; A. Delâge; A. Bogdanov; S. Janz; B. Syrett
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Paper Abstract

We show that integrated optical star couplers can be useful characterization devices to measure the sidewall roughness-induced scattering losses of planar waveguides. We describe the detailed fabrication processes of these star couplers on the silicon-on-insulator (SOI) platform and the process improvements implemented to reduce the waveguide sidewall roughness and scattering loss. We report the main process challenges, particularly to assure a clear gap between any adjacent waveguides of the dense and closely spaced output waveguide array. These challenges are addressed by optimizing the exposure dose of the resist and adding an oxygen ashing treatment to eliminate waveguide footings. We demonstrate further improvement on the waveguide profile and sidewall roughness through the use of a thin Cr hardmask for the dry plasma etching. This optimized fabrication process is capable of producing approximately a 3 nm root-mean-square sidewall roughness, measured using both scanning electron microscopy (SEM) and atomic force microscopy (AFM). Using the fabricated star couplers, we manage to measure the relative scattering losses of various waveguides with the width varying from 0.2 to 2.0 μm in a single measurement, and show that the measured losses agree with the measured sidewall roughness.

Paper Details

Date Published: 11 January 2008
PDF: 12 pages
Proc. SPIE 6800, Device and Process Technologies for Microelectronics, MEMS, Photonics, and Nanotechnology IV, 680014 (11 January 2008); doi: 10.1117/12.758968
Show Author Affiliations
K. P. Yap, Carleton Univ. (Canada)
J. Lapointe, National Research Council (Canada)
B. Lamontagne, National Research Council (Canada)
A. Delâge, National Research Council (Canada)
A. Bogdanov, National Research Council (Canada)
S. Janz, National Research Council (Canada)
B. Syrett, Carleton Univ. (Canada)


Published in SPIE Proceedings Vol. 6800:
Device and Process Technologies for Microelectronics, MEMS, Photonics, and Nanotechnology IV
Hark Hoe Tan; Jung-Chih Chiao; Lorenzo Faraone; Chennupati Jagadish; Jim Williams; Alan R. Wilson, Editor(s)

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