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Proceedings Paper

Diameter distribution of thermally evaporated indium metal islands on silicon substrates
Author(s): Joleyn Balch; Loucas Tsakalakos; William Huber; James Grande; Michael Knussman; Timothy S. Cale
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Paper Abstract

Although many groups have studied the initial growth stages of various metals, including indium, there is little information in literature on diameter distributions of indium in relation to film thickness or annealing conditions. This paper reports island size distributions of thermally evaporated In islands on Si (100) and Si (111) substrates for nominal film thicknesses ranging from 5 to 50 nm. Because indium has a low melting temperature, and therefore a high homologous temperature at room temperature, 3-dimensional islands form during deposition with no subsequent heat treatments needed. Island diameters were calculated using commercial image analysis software in conjunction with SEM images of the samples. It is found that there is a bimodal island diameter distribution for nominal indium thicknesses greater than 5 nm. While the diameters of the larger islands increase exponentially with nominal thickness, those of the smaller islands increase linearly, and therefore more slowly, with nominal thickness. For nominal thickness of 50 nm, the average diameters of the small and large islands differ by almost an order of magnitude. Anneal conditions were studied in an attempt to narrow diameter distributions. Samples of each nominal thickness were annealed at temperatures ranging from 360°C to 550°C and the diameters again measured. The range of island diameters become narrower with 360°C anneal and volume average island diameter increases by ~30-50%. This narrowing of the distribution occurs due to smaller islands being absorbed by the larger in a process akin to Ostwald ripening, which is facilitated by higher surface diffusivities at higher homologous temperatures.

Paper Details

Date Published: 11 October 2007
PDF: 12 pages
Proc. SPIE 6768, Nanomaterials Synthesis, Interfacing, and Integrating in Devices, Circuits, and Systems II, 67680A (11 October 2007); doi: 10.1117/12.752593
Show Author Affiliations
Joleyn Balch, General Electric Global Research Ctr. (United States)
Loucas Tsakalakos, General Electric Global Research Ctr. (United States)
William Huber, GE Global Research (United States)
James Grande, General Electric Global Research Ctr. (United States)
Michael Knussman, General Electric Global Research Ctr. (United States)
Timothy S. Cale, Rensselaer Polytechnic Institute (United States)

Published in SPIE Proceedings Vol. 6768:
Nanomaterials Synthesis, Interfacing, and Integrating in Devices, Circuits, and Systems II
Nibir K. Dhar; Achyut K. Dutta; M. Saif Islam, Editor(s)

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