Share Email Print
cover

Proceedings Paper

Implementation of large kernel 2-D convolution in limited FPGA resource
Author(s): Sheng Zhong; Yang Li; Luxin Yan; Tianxu Zhang; Zhiguo Cao
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

2-D Convolution is a simple mathematical operation which is fundamental to many common image processing operators. Using FPGA to implement the convolver can greatly reduce the DSP's heavy burden in signal processing. But with the limit resource the FPGA can implement a convolver with small 2-D kernel. In this paper, An FIFO type line delayer is presented to serve as the data buffer for convolution to reduce the data fetching operation. A finite state machine is applied to control the reuse of multipliers and adders arrays. With these two techniques, a resource limited FPGA can be used to implement a larger kernel convolver which is commonly used in image process systems.

Paper Details

Date Published: 14 November 2007
PDF: 6 pages
Proc. SPIE 6789, MIPPR 2007: Medical Imaging, Parallel Processing of Images, and Optimization Techniques, 67892N (14 November 2007); doi: 10.1117/12.750052
Show Author Affiliations
Sheng Zhong, Huazhong Univ. of Science and Technology (China)
Yang Li, Huazhong Univ. of Science and Technology (China)
Luxin Yan, Huazhong Univ. of Science and Technology (China)
Tianxu Zhang, Huazhong Univ. of Science and Technology (China)
Zhiguo Cao, Huazhong Univ. of Science and Technology (China)


Published in SPIE Proceedings Vol. 6789:
MIPPR 2007: Medical Imaging, Parallel Processing of Images, and Optimization Techniques

© SPIE. Terms of Use
Back to Top