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Proceedings Paper

Development of mask-DFM system "MiLE" load estimation of mask manufacturing
Author(s): Yoshikazu Nagamura; Kunihiro Hosono; Shogo Narukawa; Hiroshi Mohri; Naoya Hayashi; Masahiro Kato; Hidemichi Kawase
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Paper Abstract

Load of photomask manufacturing for the most advanced semiconductor devices is increasing due to the complexity of mask layouts caused by highly accurate RET or OPC, tight specification for 2D/3D mask structures, and requirements of quick deliveries. The mask cost becomes a concern of mask users especially in SoC businesses because the number of masks required throughout the wafer process is almost the same for each product regardless of the variety in production volume when a unified platform is applied to the designs. Shares of mask cost within total production cost cannot be ignored especially in small volume SoC products. DFM (design for manufacturing) is inevitable in a mask level as well as in a wafer level to solve the cost problem. "Mask-DFM" is a method to decrease the burden of mask manufacturing and to improve the yield and quality of masks, not only by modification of mask pattern layouts (design) but also all other things including utilization of designer's intents. We have developed our Mask-DFM system called "MiLE", that calculates mask-manufacturing workload through layout analyses combining information of mask configuration, and visualizes the consequence of Mask-DFM efforts. "MiLE (Mask manufacturIng Load Estimation)" calculates a relative index which represents the mask manufacturing workload determined by factors of 1) EB writing, 2) defect inspection/repair, 3) materials and processes and 4) specification. All the factors are computed before tape-outs for mask making in the system by the following methods. To estimate EB writing time, we applied high-throughput simulator and counted the number of "shot", minimum figure unit in EB writing, by using post-OPC layout data. Mask layout that caused troubles and extra load in mask inspection or repair was specified from MRC (mask rule checking) of the same post-OPC data. Additional layout analysis perceives designer's intents that are described in the layout data and these are reflected in the calculation of the "MiLE" index. Finally, chip arrangement on a mask is retrieved from so-called electronic mask spec sheets to construct mask layouts. "MiLE" notifies to designers the index of mask manufacturing workload that is caused by mask layout, while modification and adjustments of design or OPC are iterated to maximize device productivity in early design phases. Therefore, designers can judge and control the mask manufacturability, or mask cost by designs and additional intents useful for mask making. In the production phases, our system releases useful information for mask manufacturing to a mask shop and decreases the mask manufacturing workload. In this paper, we report the outline and functions of MiLE system and the results of mask manufacturing workload calculation using post-OPC layout data.

Paper Details

Date Published: 30 October 2007
PDF: 9 pages
Proc. SPIE 6730, Photomask Technology 2007, 67300N (30 October 2007); doi: 10.1117/12.746577
Show Author Affiliations
Yoshikazu Nagamura, Renesas Technology Corp. (Japan)
Kunihiro Hosono, Renesas Technology Corp. (Japan)
Shogo Narukawa, Dai Nippon Printing Co., Ltd. (Japan)
Hiroshi Mohri, Dai Nippon Printing Co., Ltd. (Japan)
Naoya Hayashi, Dai Nippon Printing Co., Ltd. (Japan)
Masahiro Kato, Keirex Technology Inc. (Japan)
Hidemichi Kawase, Keirex Technology Inc. (Japan)

Published in SPIE Proceedings Vol. 6730:
Photomask Technology 2007
Robert J. Naber; Hiroichi Kawahira, Editor(s)

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