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Proceedings Paper

Buffer optimization for high-quality InP-on-GaAs(001) quasi-substrates
Author(s): Jing Zhou; Xiaomin Ren; Deping Xiong; Jihe Lv; Qi Wang; Yongqing Huang; Hui Huang; Shiwei Cai
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Paper Abstract

In this work, we reported the buffers optimum of high-quality InP epilayer grown on GaAs substrate for fabrication of InP-related devices. First, LT-GaAs (450°C, 15nm)/LT-InP((450°C, 15nm) double LT buffers were deposited on the substrate as the initial layers. The effects of double LT buffers were studied compared with the results of single LT-InP buffer scheme. It was demonstrated that: (i) with a proper LT-GaAs buffer thickness, the double LT-buffer became more "compliant" for strain accommodation than single LT-InP buffer; (ii) there existed an optimal thickness of LT-GaAs buffer for a given thickness of LT-InP layer at which the crystal quality reached the best, just like the conventional buffer optimum process. Second, in order to block the "escaped" dislocations from the buffer/substrate interface, InxGa1-xP/InP (x≈0.2) strained superlattices (SLS) were introduced as defect filtering layers before the growth of the final InP layer. We investigated the effects of the periods and inserting position of the SLS on the stress relaxation and the crystal quality of InP top layer. It was suggested that when the total thickness of the epilayer was fixed, both the thickness and the periods and the distance from the interface should be carefully designed to reduce the stress and improve the crystal quality of the epilayer simultaneously. Finally, a 2-μm-thick InP epilayer was grown on GaAs substrate using (450°C, 15nm)/LT-InP(450°C, 15nm) double LT buffers combined with inserting 15-period (4nm/6nm) In0.8Ga0.2P/InP SLS into epilayer. Then X-ray diffraction measurements showed the best result of the full width at half maximum (FWHM) was 203 arcsec with estimated dislocation density of 2.8×107 cm-2.

Paper Details

Date Published: 26 November 2007
PDF: 7 pages
Proc. SPIE 6782, Optoelectronic Materials and Devices II, 678229 (26 November 2007); doi: 10.1117/12.743224
Show Author Affiliations
Jing Zhou, Beijing Univ. of Posts and Telecommunications (China)
Xiaomin Ren, Beijing Univ. of Posts and Telecommunications (China)
Deping Xiong, Beijing Univ. of Posts and Telecommunications (China)
Jihe Lv, Beijing Univ. of Posts and Telecommunications (China)
Qi Wang, Beijing Univ. of Posts and Telecommunications (China)
Yongqing Huang, Beijing Univ. of Posts and Telecommunications (China)
Hui Huang, Beijing Univ. of Posts and Telecommunications (China)
Shiwei Cai, Beijing Univ. of Posts and Telecommunications (China)


Published in SPIE Proceedings Vol. 6782:
Optoelectronic Materials and Devices II
Yoshiaki Nakano, Editor(s)

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