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Proceedings Paper

Thermal management methods for compact high power LED arrays
Author(s): Adam Christensen; Minseok Ha; Samuel Graham
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Paper Abstract

The package and system level temperature distributions of a high power (>1W) light emitting diode (LED) array has been investigated using numerical heat flow models. For this analysis, a thermal resistor network model was combined with a 3D finite element submodel of an LED structure to predict system and die level temperatures. The impact of LED array density, LED power density, and active versus passive cooling methods on device operation were calculated. In order to help understand the role of various thermal resistances in cooling such compact arrays, the thermal resistance network was analyzed in order to estimate the contributions from materials as well as active and passive cooling schemes. An analysis of thermal stresses and residual stresses in the die are also calculated based on power dissipation and convection heat transfer coefficients. Results show that the thermal stress in the GaN layer are compressive which can impact the band gap and performance of the LEDs.

Paper Details

Date Published: 14 September 2007
PDF: 19 pages
Proc. SPIE 6669, Seventh International Conference on Solid State Lighting, 66690Z (14 September 2007); doi: 10.1117/12.741934
Show Author Affiliations
Adam Christensen, Georgia Institute of Technology (United States)
Minseok Ha, Georgia Institute of Technology (United States)
Samuel Graham, Georgia Institute of Technology (United States)


Published in SPIE Proceedings Vol. 6669:
Seventh International Conference on Solid State Lighting
Ian T. Ferguson; Nadarajah Narendran; Tsunemasa Taguchi; Ian E. Ashdown, Editor(s)

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