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Proceedings Paper

Improvement of etching selectivity for 32-nm node mask making
Author(s): C. L. Lu; L. Y. Hsia; T. H. Cheng; S. C. Chang; W. C. Wang; H. J. Lee; Y. C. Ku
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Paper Abstract

As the geometry of semiconductor devices continue to scale down, high-NA imaging will be used to enhance the resolution. Sub-resolution assistant features are used to gain depth of focus at the wafer. One of the challenges in patterning small assistant features during mask fabricating is resist collapse. Reducing resist thickness is one of the solutions. This necessitates an increase in the selectivity of chromium (Cr) to photo-resist (PR). The selectivity determines the PR remaining on the mask after Cr etching. Insufficient remaining PR will induce pinhole-type clear defect and poor line edge roughness (LER). In this paper, the Cr-to-PR selectivity was studied under induced couple plasma (ICP) and quasi-remote plasma environment. PR remaining, etching bias, and critical dimension uniformity (CDU) are the main subjects for evaluation. To understand the etching behavior for higher selectivity, design of experiment (DOE) L4 by Taguchi method is used to find the dominating factors. By adopting the optimized etching recipe, the resist can be thinned down to effectively improve its collapse margin, especially for smaller assistant features. The results show that 72-nm assistant features on mask can be patterned for early 32-nm node development. This paper also suggests several approaches that can be used to reduce the required resist thickness, such as hard-mask, film thickness reduction, and etcher hardware modification.

Paper Details

Date Published: 11 May 2007
PDF: 8 pages
Proc. SPIE 6607, Photomask and Next-Generation Lithography Mask Technology XIV, 66070E (11 May 2007); doi: 10.1117/12.728928
Show Author Affiliations
C. L. Lu, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
L. Y. Hsia, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
T. H. Cheng, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
S. C. Chang, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
W. C. Wang, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
H. J. Lee, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Y. C. Ku, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)


Published in SPIE Proceedings Vol. 6607:
Photomask and Next-Generation Lithography Mask Technology XIV
Hidehiro Watanabe, Editor(s)

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