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Proceedings Paper

Low frequency gate noise modeling of ultrathin oxide MOSFETs
Author(s): F. Martinez; M. Valenza
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Paper Abstract

An analytical model for 1/f gate noise is developed and applied to the simulation and the characterization of ultra-thin MOSFETs. The proposed model is based on oxide trapping mechanisms and uses the concept of equivalent flat band voltage fluctuations. The developed model reproduces experimental behaviors. The power spectral density of flat band voltage fluctuation extracted from gate current low frequency noise is compared to one extracted from drain low frequency noise. Moreover, we have performed 1/f gate current noise for various drain voltage, and we show that there is no impact of the drain current noise on the gate current noise. We also investigate RTS noise observed on the gate leakage current. Finally, we present the characterization of the gate to drain overlap leakage current and its influence on gate current noise level.

Paper Details

Date Published: 11 June 2007
PDF: 12 pages
Proc. SPIE 6600, Noise and Fluctuations in Circuits, Devices, and Materials, 66001O (11 June 2007); doi: 10.1117/12.726920
Show Author Affiliations
F. Martinez, IES, CEM2, CNRS, Univ. Montpellier II (France)
M. Valenza, IES, CEM2, CNRS, Univ. Montpellier II (France)


Published in SPIE Proceedings Vol. 6600:
Noise and Fluctuations in Circuits, Devices, and Materials
Massimo Macucci; Lode K.J. Vandamme; Carmine Ciofi; Michael B. Weissman, Editor(s)

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