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Proceedings Paper

Design and implementation of high-speed CCD driving circuit based on CPLD
Author(s): L. Zhang; Y. X. Li; X. J. Li; X. W. Xu
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Paper Abstract

In CCD detecting system of dynamic target, the design of high speed CCD driving circuit is a key technique in its application. This paper, taking CCD IL-P3 produced by DALSA Company recently for example, according to the demands of CCD driving timing, introduces a designing method of high speed CCD driving circuit. A CPLD device of ALTERA Company's MAX7000S series is chosen as a hardware carrier to design the driving timing generator with adjustable exposure time. After compiled and simulated in MAX+PLUSII, the program is fitted into the CPLD device by using JTAG interface. And experimental results show that the expected CCD driving plus signals can be get.

Paper Details

Date Published: 11 January 2007
PDF: 6 pages
Proc. SPIE 6279, 27th International Congress on High-Speed Photography and Photonics, 62791M (11 January 2007); doi: 10.1117/12.725215
Show Author Affiliations
L. Zhang, Nanjing Univ. of Science and Technology (China)
Hefei Univ. (China)
Y. X. Li, Nanjing Univ. of Science and Technology (China)
X. J. Li, Hefei Univ. (China)
X. W. Xu, Hefei Univ. (China)


Published in SPIE Proceedings Vol. 6279:
27th International Congress on High-Speed Photography and Photonics

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