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Proceedings Paper

Rapid implementation of image processing onto FPGA using modular DSP C6201 VHDL model
Author(s): V. Brost; F. Yang; M. Paindavoine; X. J. Liu
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Paper Abstract

Recent FPGA chips, with their large capacity memory and reconfigurability potential, have opened new frontiers for rapid prototyping of embedded systems. With the advent of high density FPGAs it is now feasible to implement a high-performance VLIW processor core in an FPGA. We describe research results of enabling the DSP TMS320 C6201 model for real-time image processing applications, by exploiting FPGA technology. The goals are, firstly, to keep the flexibility of DSP in order to shorten the development cycle, and secondly, to use powerful available resources on FPGA to a maximum in order to increase real-time performance. We present a modular DSP C6201 VHDL model which contains only the bare minimum number of instruction sets, or modules, necessary for each target application. This allows an optimal implementation on the FPGA. Some common algorithms of image processing were created and validated on an FPGA VirtexII-2000 multimedia board using the proposed application development cycle. Our results demonstrate that an algorithm can easily be, in an optimal manner, specified and then automatically converted to VHDL language and implemented on an FPGA device with system level software.

Paper Details

Date Published: 11 January 2007
PDF: 6 pages
Proc. SPIE 6279, 27th International Congress on High-Speed Photography and Photonics, 62790P (11 January 2007); doi: 10.1117/12.725104
Show Author Affiliations
V. Brost, Univ. of Burgandy (France)
F. Yang, Univ. of Burgandy (France)
M. Paindavoine, Univ. of Burgandy (France)
X. J. Liu, Univ. of Burgandy (France)

Published in SPIE Proceedings Vol. 6279:
27th International Congress on High-Speed Photography and Photonics

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