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Proceedings Paper

Characterization and model enablement of high-frequency noise in 90-nm CMOS technology
Author(s): Zhenrong Jin; Hongmei Li; Susan Sweeney; Radhika Allamraju; David Greenberg; Basanth Jagannanthan; Scott Parker; Xiaowei Tian
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Paper Abstract

A new method based on the lumped-element network representation of the pad-set parasitics is developed to extract the intrinsic drain current noise source and gate resistance from raw measurement data instead of direct de-embedding. The length dependence of BSIM noise model is also corrected using a sub-circuit in the model file. With the new method, we can finally integrate an improved and hardware verified noise model into design kits.

Paper Details

Date Published: 11 June 2007
PDF: 7 pages
Proc. SPIE 6600, Noise and Fluctuations in Circuits, Devices, and Materials, 66001Q (11 June 2007); doi: 10.1117/12.724709
Show Author Affiliations
Zhenrong Jin, IBM Corp. (United States)
Hongmei Li, IBM Corp. (United States)
Susan Sweeney, IBM Corp. (United States)
Radhika Allamraju, IBM Corp. (United States)
David Greenberg, IBM Corp. (United States)
Basanth Jagannanthan, IBM Corp. (United States)
Scott Parker, RF Micro Devices (United States)
Xiaowei Tian, IBM Corp. (United States)


Published in SPIE Proceedings Vol. 6600:
Noise and Fluctuations in Circuits, Devices, and Materials
Massimo Macucci; Lode K.J. Vandamme; Carmine Ciofi; Michael B. Weissman, Editor(s)

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