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Proceedings Paper

H.264 video stream statistical analysis for post-compression improvements
Author(s): J. Hugo Pérez Casanova; Francisco J. Ballester Merelo; Marcos A. Martínez Peiró; Josep Canals Esteve
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Paper Abstract

As today's video applications are being requested in many portable end-user devices, and these ones are far capable of holding and processing large amounts of video data, there is a need for bit rate improvement in compression algorithms. The objective of this paper is to propose a hardware based post-compression enhancer situated between the Video Coding Layer and the Network Abstraction Layer of H.264. Our research analyzes the resulting bit streams produced by the emerging H.264 standard. The goal is to enhance compression rates by proposing simple post-compression techniques based in symbol's statistics. The CABAC and CAVLC entropy coders used in H.264 work optimally for 1-bit symbols, and the statistical distribution among them is almost the best. Our studies reveal that the bit streams presents similar results for 8-bit symbols, and thus a post-compression using well known byte-based mechanisms will not yield better results; further more, our studies also show that they even degrade the original compression rate. Nevertheless, a non equally distribution using 6-bits symbols in 2046-bits discrete data packets is found, which can be exploited to boost compression. This distribution varies between 5.4% for the most probable symbol and 0.98% for the least probable symbol in average. Again, simple coding a few of the most probable symbols will result in bit rate reduction. A 1- bit compression enhanced used flag penalty must be introduced for each discrete packet, increasing its size in 0.049%.

Paper Details

Date Published: 10 May 2007
PDF: 9 pages
Proc. SPIE 6590, VLSI Circuits and Systems III, 659011 (10 May 2007); doi: 10.1117/12.724165
Show Author Affiliations
J. Hugo Pérez Casanova, Univ. Politècnica de València (Spain)
Francisco J. Ballester Merelo, Univ. Politècnica de València (Spain)
Marcos A. Martínez Peiró, Univ. Politècnica de València (Spain)
Josep Canals Esteve, Univ. Politècnica de València (Spain)


Published in SPIE Proceedings Vol. 6590:
VLSI Circuits and Systems III
Valentín de Armas Sosa; Kamran Eshraghian; Félix B. Tobajas, Editor(s)

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