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Proceedings Paper

Advances in 3D integration of heterogeneous materials and technologies
Author(s): D. Temple; J. M. Lannon; D. Malta; J. E. Robinson; P. R. Coffman; T. B. Welch; M. R. Skokan; A. J. Moll; W. B. Knowlton
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Paper Abstract

Military applications demand more and more complex, multifunctional microsystems with performance characteristics which can only be achieved by using best-of-breed materials and device technologies for the microsystem components. Three-dimensional (3-D) integration of separate, individually complete device layers provides a way to build complex microsystems without compromising the system performance and fabrication yield. In the 3-D integration approach, each device layer is fabricated separately using optimized materials and processes. The layers are stacked and interconnected through area array vertical interconnects with lengths on the order of just tens of microns. This paper will review recent advances in development of 3-D integration technologies with focus on those which enable integration of heterogeneous materials (e.g. HgCdTe FPAs with silicon ROICs) or heterogeneous fabrication processes (e.g. resistive IR emitters with RIICs).

Paper Details

Date Published: 30 April 2007
PDF: 6 pages
Proc. SPIE 6544, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XII, 65440I (30 April 2007); doi: 10.1117/12.722502
Show Author Affiliations
D. Temple, RTI International (United States)
J. M. Lannon, RTI International (United States)
D. Malta, RTI International (United States)
J. E. Robinson, DRS Infrared Technologies (United States)
P. R. Coffman, DRS Infrared Technologies (United States)
T. B. Welch, DRS Infrared Technologies (United States)
M. R. Skokan, DRS Infrared Technologies (United States)
A. J. Moll, Boise State Univ. (United States)
W. B. Knowlton, Boise State Univ. (United States)


Published in SPIE Proceedings Vol. 6544:
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing XII
Robert Lee Murrer, Editor(s)

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