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Proceedings Paper

A low-voltage fully balanced CMFF transconductor with improved linearity
Author(s): B. Calvo; S. Celma; J. P. Alegre; M. T. Sanz
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Paper Abstract

This paper presents a new low-voltage pseudo-differential continuous-time CMOS transconductor for wideband applications. The proposed cell is based on a feedforward cancellation of the input common-mode signal and keeps the input common mode voltage constant, while the transconductance is easily tunable through a continuous bias voltage. Linearity is preserved during the tuning process for a moderate range of transconductance values. Simulation results for a 0.35 &mgr;m CMOS design show a 1:2 Gm tuning range with an almost constant bandwidth over 600 MHz. Total harmonic distortion figures are below -60 dB over the whole range at 10 MHz up to a 200 &mgr;Ap-p differential output. The proposed cell consumes less than 1.2 mW from a single 2.0 V supply.

Paper Details

Date Published: 10 May 2007
PDF: 9 pages
Proc. SPIE 6590, VLSI Circuits and Systems III, 65901B (10 May 2007); doi: 10.1117/12.722000
Show Author Affiliations
B. Calvo, Univ. of Zaragoza (Spain)
S. Celma, Univ. of Zaragoza (Spain)
J. P. Alegre, Univ. of Zaragoza (Spain)
M. T. Sanz, Univ. of Zaragoza (Spain)


Published in SPIE Proceedings Vol. 6590:
VLSI Circuits and Systems III
Valentín de Armas Sosa; Kamran Eshraghian; Félix B. Tobajas, Editor(s)

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