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Proceedings Paper

Charge transport in nanoscaled silicon-on-insulator devices
Author(s): Francisco Gamiz; Andres Godoy; Carlos Sampedro
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Paper Abstract

The electron transport properties of different Silicon on Insulator (SOI) devices have been studied. We have considered two type of semiconductor structures: i) quantum-well SOI structures and ii) quantum-wire devices. In the first group, Qwell-based devices, the electron mobility in double-gate SOI devices as the silicon thickness, decreases was compared with the mobility in Single-Gate SOI structures. Thus, we determined the existence of a range of silicon layer thicknesses in which electron mobility in DGSOI inversion layers is significantly improved as compared to bulk-silicon or SGSOI inversion layers, due to the volume inversion effect. With regard to QWire-based devices, we have analyzed the phonon-limited mobility in silicon quantum wires by means of a one-particle Monte Carlo simulator. It has been observed that the increasing of the phonon scattering produces a noticeable reduction of the electron mobility observed when the device dimensions are reduced. Therefore, we have observed that the transition from a 2D to a 1D electron gas produces a degradation of the electron transport properties.

Paper Details

Date Published: 16 May 2007
PDF: 9 pages
Proc. SPIE 6591, Nanotechnology III, 65910C (16 May 2007); doi: 10.1117/12.721838
Show Author Affiliations
Francisco Gamiz, Univ. de Granada (Spain)
Andres Godoy, Univ. de Granada (Spain)
Carlos Sampedro, Univ. de Granada (Spain)

Published in SPIE Proceedings Vol. 6591:
Nanotechnology III
Fernando Briones, Editor(s)

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