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Proceedings Paper

Design of frequency divider based on FPGA
Author(s): Yi Hu; Xia Wang; Yetai Fei
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Paper Abstract

This paper introduces the realization of half-integral frequency divider on the principle and gives the circuit schematic diagram. Based on the half-integral frequency divider, a design method of a general frequency divider is given by controlling the gating of exclusive-OR gate. Even, odd and decimal frequency division is realized using the model of the general frequency divider, which is designed by use of VHDL hardware description language and the schematic diagram input mode with the development software of MAX+plus II. The low layer VHDL descriptions and the designs of top layer schematic diagram of the frequency divider are presented in the paper. To validate the design, the designed dividers which have different coefficient of frequency division are simulated, and the figures are presented. Results of experiment in the device of ALTERA Corporation's EPF10K20 proof much more that the general frequency divider can realize a several of frequency division functions.

Paper Details

Date Published: 13 October 2006
PDF: 6 pages
Proc. SPIE 6280, Third International Symposium on Precision Mechanical Measurements, 62800H (13 October 2006); doi: 10.1117/12.716139
Show Author Affiliations
Yi Hu, Hefei Univ. of Technology (China)
Xia Wang, Hefei Univ. of Technology (China)
Yetai Fei, Hefei Univ. of Technology (China)


Published in SPIE Proceedings Vol. 6280:
Third International Symposium on Precision Mechanical Measurements
Kuang-Chao Fan; Wei Gao; Xiaofen Yu; Wenhao Huang; Penghao Hu, Editor(s)

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