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Proceedings Paper

Some non-resist component contributions to LER and LWR in 193-nm lithography
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Paper Abstract

Improvement of line edge roughness (LER) and line width roughness (LWR) is required for integration of semiconductor devices. This paper describes various process factors affecting LER/LWR of 193 nm resists such as mask layout (bright field/dark field), pitches, optical settings, substrates, film thickness, baking temperature and development condition. The origins of line roughness are discussed in view of aerial image contrast, transmittance of resists and pattern profiles. Bright field mask exhibited lower LER/LWR values than dark field mask, LER/LWR deteriorated as larger pitches and illumination condition affected roughness and these results are explained using normalized image log-slope (NILS). BARC dependence of line roughness is explained by pattern profile difference due to interactions between resist and BARC and in some cases BARC reflectivity. Contributions of film thickness, SB & PEB temperature and development condition to line roughness are also reported.

Paper Details

Date Published: 6 April 2007
PDF: 12 pages
Proc. SPIE 6519, Advances in Resist Materials and Processing Technology XXIV, 651941 (6 April 2007); doi: 10.1117/12.713221
Show Author Affiliations
Takanori Kudo, AZ Electronic Materials USA Corp. (United States)
Srinivasan Chakrapani, AZ Electronic Materials USA Corp. (United States)
Guanyang Lin, AZ Electronic Materials USA Corp. (United States)
Clement Anyadiegwu, AZ Electronic Materials USA Corp. (United States)
Charito Antonio, AZ Electronic Materials USA Corp. (United States)
Deepa Parthasarathy, AZ Electronic Materials USA Corp. (United States)
Ralph R. Dammel, AZ Electronic Materials USA Corp. (United States)
Munirathna Padmanaban, AZ Electronic Materials USA Corp. (United States)


Published in SPIE Proceedings Vol. 6519:
Advances in Resist Materials and Processing Technology XXIV
Qinghuang Lin, Editor(s)

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