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Proceedings Paper

Minimizing poly end cap pull back by application of DFM and advanced etch approaches for 65nm and 45nm technologies
Author(s): Russell Callahan; Gunter Grasshoff; Stefan Roling; Joseph Shannon; Asuka Nomura; Sarah N. McGowan; Cyrus E. Tabery; Karla Romero
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Paper Abstract

As feature sizes decrease and the overall design shrinks, it is becoming increasingly difficult to reliably pattern gate line ends, or poly end caps, so that they are able to extend over to the field area without bridging into an adjacent feature. Furthermore, the trimming of the lines during the gate etch process is necessary due to the desire to decrease the poly length. However, the line end is also trimmed while trimming the gate sidewall, often at higher rates than the sidewall itself. This investigation focuses on decreasing the poly line end pullback, defined as the tip of the gate past active, using lithography techniques and advanced etch approaches for the 65 nm and 45 nm nodes.

Paper Details

Date Published: 21 March 2007
PDF: 11 pages
Proc. SPIE 6521, Design for Manufacturability through Design-Process Integration, 65211Q (21 March 2007); doi: 10.1117/12.712161
Show Author Affiliations
Russell Callahan, AMD Saxony Manufacturing GmbH (Germany)
Gunter Grasshoff, AMD Saxony Manufacturing GmbH (Germany)
Stefan Roling, AMD Saxony Manufacturing GmbH (Germany)
Joseph Shannon, Advanced Micro Devices (United States)
Asuka Nomura, AMD Saxony Manufacturing GmbH (Germany)
Sarah N. McGowan, Advanced Micro Devices (United States)
Cyrus E. Tabery, Advanced Micro Devices (United States)
Karla Romero, AMD Saxony Manufacturing GmbH (Germany)


Published in SPIE Proceedings Vol. 6521:
Design for Manufacturability through Design-Process Integration
Alfred K.K. Wong; Vivek K. Singh, Editor(s)

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