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Structural failure prediction using simplified lithography simulation models
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Paper Abstract

Existing approaches to predict those locations in a full-chip layout representing a high risk of structural failure, i.e., bridging or pinching, either rely on lithography simulation using empirical resist models or on a more abstract empirical analysis of aerial image characteristics. Both approaches bear the risk of extrapolating an empirical model well beyond the regime within which it was calibrated and where it can be considered reliable. In this paper, we present as an alternative a systematic method (a) to build a simple, sturdy "constant threshold" (CTR) model that is valid over the required process window and (b) to determine empirical criteria for structural failure detection based on simulations with this CTR model. Even though such a model is not capable of accurately predicting the dimension of structures, it captures trends of the printing behavior very well, even into the failure regime. From standard wafer data, such as used for "optical proximity correction" (OPC) model building, it is straightforward to find out which test structures are not resolved well with a given process. Combined with the CTR model simulation results, this can be used to determine threshold values for the space and width of simulated structures that indicate structural failure, separately for bridging and pinching. The predictive power of this approach has already been verified on hardware and is used in production.

Paper Details

Date Published: 21 March 2007
PDF: 8 pages
Proc. SPIE 6521, Design for Manufacturability through Design-Process Integration, 652107 (21 March 2007); doi: 10.1117/12.712054
Show Author Affiliations
P. Niedermaier, Qimonda AG (Germany)
T. Roessler, Qimonda AG (Germany)

Published in SPIE Proceedings Vol. 6521:
Design for Manufacturability through Design-Process Integration
Alfred K.K. Wong; Vivek K. Singh, Editor(s)

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