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Proceedings Paper

The optimization of zero-spaced microlenses for 2.2um pixel CMOS image sensor
Author(s): Hyun hee Nam; Jeong Lyeol Park; Jea Sung Choi; Jeong Gun Lee
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Paper Abstract

In CMOS image sensor, microlens arrays are generally used as light propagation carrier onto photo diode to increase collection efficiency and reduce optical cross-talk. Today, the scaling trend of CMOS technology drives reduction of the pixel size for higher integration density and resolution improvement. Microlenses are typically formed by photo resist patterning and thermal reflowing, and the space between photo resist is necessary to avoid merging of microlenses during thermal reflow process. With the shrinking sizes, microlenses become more and more difficult to manufacture without their merging. Hence, the key of light loss free microlens fabrication is still zero-space between microlenses. In this paper, we report the selection of the optimum shape of microlens by the dead space and the curvature of radius. The improvements of critical dimension and thickness uniformities of microlens are also reported.

Paper Details

Date Published: 26 March 2007
PDF: 12 pages
Proc. SPIE 6520, Optical Microlithography XX, 652034 (26 March 2007); doi: 10.1117/12.711985
Show Author Affiliations
Hyun hee Nam, MagnaChip Semiconductor Inc. (South Korea)
Jeong Lyeol Park, MagnaChip Semiconductor Inc. (South Korea)
Jea Sung Choi, MagnaChip Semiconductor Inc. (South Korea)
Jeong Gun Lee, MagnaChip Semiconductor Inc. (South Korea)

Published in SPIE Proceedings Vol. 6520:
Optical Microlithography XX
Donis G. Flagello, Editor(s)

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