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Defect transfer from immersion exposure process to post processing and defect reduction using novel immersion track system
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Paper Abstract

As a promising way to scale down semiconductor devices, 193-nm immersion exposure lithography is being developed at a rapid pace and is nearing application to mass production. This technology allows the design of projection lens with higher numerical aperture (NA) by filling the space between the projection lens and the silicon wafer with a liquid (de-ionized water). However, direct contact between the resist film and water during exposure creates a number of process risks. There are still many unresolved issues and many problems to be solved concerning defects that arise in 193-nm immersion lithography. The use of de-ionized water during the exposure process in 193-nm immersion lithography can lead to a variety of problems. For example, the trapping of microscopic air bubbles can degrade resolution, and residual water droplets left on the wafer surface after immersion exposure can affect resolution in the regions under those droplets. It has also been reported that the immersion of resist film in de-ionized water during exposure can cause moisture to penetrate the resist film and dissolve resist components, and that immersion can affect critical dimensions as well as generate defects. The use of a top coat is viewed as one possible way to prevent adverse effects from the immersion of resist in water, but it has been reported that the same problems may occur even with a top coat and that additional problems may be generated, such as the creation of development residues due to the mixing of top coat and resist. To make 193-nm immersion lithography technology practical for mass production, it is essential that the above defect problems be solved. Importance must be attached to understanding the conditions that give rise to residual defects and their transference in the steps between lithography and the etching/cleaning processes. In this paper, we use 193-nm immersion lithography equipment to examine the transference (traceability) of defects that appear in actual device manufacturing. It will be shown that defect transfer to the etching process can be significantly reduced by the appropriate use of defect-reduction techniques.

Paper Details

Date Published: 22 March 2007
PDF: 10 pages
Proc. SPIE 6519, Advances in Resist Materials and Processing Technology XXIV, 651924 (22 March 2007); doi: 10.1117/12.711354
Show Author Affiliations
Osamu Miyahara, Tokyo Electron Kyushu Ltd. (Japan)
Takeshi Shimoaoki, Tokyo Electron Kyushu Ltd. (Japan)
Shinya Wakamizu, Tokyo Electron Kyushu Ltd. (Japan)
Junichi Kitano, Tokyo Electron Kyushu Ltd. (Japan)
Yoshiharu Ono, Renesas Technology Corp. (Japan)
Shinroku Maejima, Renesas Technology Corp. (Japan)
Tetsuro Hanawa, Renesas Technology Corp. (Japan)
Kazuyuki Suko, Renesas Technology Corp. (Japan)

Published in SPIE Proceedings Vol. 6519:
Advances in Resist Materials and Processing Technology XXIV
Qinghuang Lin, Editor(s)

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