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Proceedings Paper

Stochastic simulation of material and process effects on the patterning of complex layouts
Author(s): N. Tsikrikas; D. Drygiannakis; G. P. Patsis; G. Kokkoris; I. Raptis; E. Gogolides
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Paper Abstract

The whole process of stochastic lithography simulation combined with an electron-beam simulation module, could be useful in the validation of design rules taking into account fine details such as line-edge roughness, and for simulating the layout before actual fabrication for design inconsistencies. Material and process parameters can no more be considered of second order importance in high-density designs. Line-width roughness quantification should accompany CD measurements since it could be a large fraction of the total CD budget. An example of the effects of exposure, material and processes on layouts are presented in this work using a combination of electron beam simulation for the exposure part, stochastic simulations for the modeling of resist film, the post-exposure bake, resist dissolution, and a simple analytic model for resist etching. Particular examples of line-width roughness and critical dimension non-uniformity due to, material, and process effects on the gate of a standard CMOS inverter layout are presented.

Paper Details

Date Published: 6 April 2007
PDF: 10 pages
Proc. SPIE 6518, Metrology, Inspection, and Process Control for Microlithography XXI, 651836 (6 April 2007); doi: 10.1117/12.708858
Show Author Affiliations
N. Tsikrikas, Institute of Microelectronics (Greece)
D. Drygiannakis, Institute of Microelectronics (Greece)
G. P. Patsis, Institute of Microelectronics (Greece)
G. Kokkoris, Institute of Microelectronics (Greece)
I. Raptis, Institute of Microelectronics (Greece)
E. Gogolides, Institute of Microelectronics (Greece)


Published in SPIE Proceedings Vol. 6518:
Metrology, Inspection, and Process Control for Microlithography XXI
Chas N. Archie, Editor(s)

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