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Proceedings Paper

Patterning with amorphous carbon spacer for expanding the resolution limit of current lithography tool
Author(s): Woo-Yung Jung; Sang-Min Kim; Choi-Dong Kim; Guee-Hwang Sim; Sung-Min Jeon; Sang-Wook Park; Byung-Seok Lee; Sung-Ki Park; Ji-Soo Kim; Lee-Sang Heon
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Paper Abstract

Double patterning technique using spacer which can avoid CD (Critical Dimension) uniformity problem mainly caused by overlay issue is one of the methods that could be applied to apply to manufacturing of memory devices. Though double exposure and etch technology (DEET) has comparative advantage in the number of process steps, it is required to dramatically improve overlay performance of current exposure tools for the realization of manufacturing. In this study, negative type-double pattering technique using spacer has been developed as the best way for the application of NAND flash memory device from the view point of CD uniformity and the number of mask layers used to complete double patterning. Negative type-double patterning technique using spacer consists of subsequent steps such as formation of poly line, spacer on sidewall of poly line, SOG gap fill into space between poly lines, SOG etch back, removal of spacer, and finally hard mask etch. We have used amorphous carbon as a spacer material to easily remove spacer from poly lines and adopted SOG material to easily fill in space between poly lines. When negative type-double patterning technique using spacer is applied to NAND flash memory device, we can expect that k1 factor of about 0.14~0.20 could be accomplished successfully.

Paper Details

Date Published: 27 March 2007
PDF: 9 pages
Proc. SPIE 6520, Optical Microlithography XX, 65201C (27 March 2007); doi: 10.1117/12.707275
Show Author Affiliations
Woo-Yung Jung, Hynix Semiconductor Inc. (South Korea)
Sang-Min Kim, Hynix Semiconductor Inc. (South Korea)
Choi-Dong Kim, Hynix Semiconductor Inc. (South Korea)
Guee-Hwang Sim, Hynix Semiconductor Inc. (South Korea)
Sung-Min Jeon, Hynix Semiconductor Inc. (South Korea)
Sang-Wook Park, Hynix Semiconductor Inc. (South Korea)
Byung-Seok Lee, Hynix Semiconductor Inc. (South Korea)
Sung-Ki Park, Hynix Semiconductor Inc. (South Korea)
Ji-Soo Kim, Lam Research Corp. (United States)
Lee-Sang Heon, Lam Research Corp. (United States)


Published in SPIE Proceedings Vol. 6520:
Optical Microlithography XX
Donis G. Flagello, Editor(s)

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