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Proceedings Paper

Two order increase in the optical emission intensity of CMOS Integrated Circuit Si LED’s (450nm – 750nm). Injection–avalanche based n+pn and p+np designs
Author(s): Lukas W. Snyman; Monuko du Plessis; Herzl Aharoni
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Paper Abstract

We report on an increase in emission intensity of up to 10 nW / microns2 that has been realized with a new novel two junction, diagonal avalanche control and minority carrier injection silicon CMOS light emitting device. The device utilizes a four terminal configuration with two shallow n+p junctions, embedded in a p substrate. One junction is kept in deep avalanche and light emitting mode, while the other junction is forward biased and minority carrier electrons are injected into the avalanching junction. The device has been realized using standard 0.35 micron CMOS design rules and fabrication technology and operates at 9V in the current range 0.1 - 3mA. The optical emission intensity is anout two orders higher than that for previous single junction n+ p light emitting junctions. The optical output is about three orders higher than the low frequency detectivity limit of silicon p-i-n detectors of comparable dimensions. The realized characteristics may enable diverse opto-electronic applications in standard CMOS silicon technology based integrated circuitry.

Paper Details

Date Published: 1 March 2007
PDF: 10 pages
Proc. SPIE 6477, Silicon Photonics II, 64770T (1 March 2007); doi: 10.1117/12.702292
Show Author Affiliations
Lukas W. Snyman, Tshwane Univ. of Technology (South Africa)
Monuko du Plessis, Univ. of Pretoria (South Africa)
Herzl Aharoni, Ben Gurion Univ. of the Negev (Israel)

Published in SPIE Proceedings Vol. 6477:
Silicon Photonics II
Joel A. Kubby; Graham T. Reed, Editor(s)

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