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Proceedings Paper

Hardware-based JPEG2000 video coding system
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Paper Abstract

In this paper, we discuss a hardware based low complexity JPEG 2000 video coding system. The hardware system is based on a software simulation system, where temporal redundancy is exploited by coding of differential frames which are arranged in an adaptive GOP structure whereby the GOP structure itself is determined by statistical analysis of differential frames. We present a hardware video coding architecture which applies this inter-frame coding system to a Digital Signal Processor (DSP). The system consists mainly of a microprocessor (ADSP-BF533 Blackfin Processor) and a JPEG 2000 chip (ADV202).

Paper Details

Date Published: 26 February 2007
PDF: 13 pages
Proc. SPIE 6496, Real-Time Image Processing 2007, 64960G (26 February 2007); doi: 10.1117/12.702278
Show Author Affiliations
Arthur R. Schuchter, Salzburg Univ. (Austria)
Andreas Uhl, Salzburg Univ. (Austria)


Published in SPIE Proceedings Vol. 6496:
Real-Time Image Processing 2007
Nasser Kehtarnavaz; Matthias F. Carlsohn, Editor(s)

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