Share Email Print

Proceedings Paper

High-speed, low-voltage optical receivers consisting of Ge-on-SOI photodiodes paired with CMOS ICs
Author(s): Clint L. Schow; Steven J. Koester; Laurent Schares; Gabriel Dehlinger; Richard A. John
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

Silicon-based, monolithically-integrated optical receivers offer the potential of lowering the cost of optical interconnects through simplified packaging and leveraging established Si-manufacturing technology, in addition to enabling new applications such as inter- and intra-chip optical links that will require large-scale receiver arrays. Silicon photodetectors have progressed, and integrated receivers have been demonstrated to operate above 10 Gb/s; however, the poor efficiency of silicon in detecting 850-nm light results in fundamental tradeoffs in performance and/or operating voltage. In contrast, using Ge as the detector material opens the possibility of producing fast, efficient, and low-voltage photodiodes compatible with CMOS processing. We have fabricated planar, interdigitated Ge-on-SOI photodiodes in Ge absorption layers grown directly on SOI wafers. Devices with 10 x 10 μm2 square active areas, biased at -2 V, with an electrode spacing of 0.6 to 0.8 μm, exhibit dark currents less than 10 nA, bandwidths in excess of 23 GHz, and external quantum efficiencies of 52 % (0.35 A/W) at a wavelength of 850 nm. We have built and characterized three different optical receivers using 0.13-μm CMOS ICs: 1) a 15-Gb/s high-gain full receiver (transimpedance amplifier, limiting amplifier, and output driver); 2) a 10-Gb/s, low-power full receiver (powered by a single 1.1-V supply); 3) a 19-Gb/s high-speed receiver front-end (transimpedance amplifier only). These receivers achieve the highest operating speed, highest sensitivity at > 10 Gb/s rates, lowest-voltage single-supply operation, and lowest power consumption for any all-silicon-based receivers reported to-date, and illustrate the performance that can be attained through combining Ge detectors with CMOS analog circuitry.

Paper Details

Date Published: 9 February 2007
PDF: 13 pages
Proc. SPIE 6477, Silicon Photonics II, 647705 (9 February 2007); doi: 10.1117/12.701003
Show Author Affiliations
Clint L. Schow, Thomas J. Watson Research Ctr. (United States)
Steven J. Koester, Thomas J. Watson Research Ctr. (United States)
Laurent Schares, Thomas J. Watson Research Ctr. (United States)
Gabriel Dehlinger, Thomas J. Watson Research Ctr. (United States)
Richard A. John, Thomas J. Watson Research Ctr. (United States)

Published in SPIE Proceedings Vol. 6477:
Silicon Photonics II
Joel A. Kubby; Graham T. Reed, Editor(s)

© SPIE. Terms of Use
Back to Top