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Proceedings Paper

Efficient approach to improving pattern fidelity with multi-OPC model and recipe
Author(s): Munhoe Do; Jaehyun Kang; Jaeyoung Choi; Junseok Lee; Yongsuk Lee; Keeho Kim
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Paper Abstract

It is becoming difficult to achieve stable device functionality and yield due to the continuous reduction of layout dimensions. Lithographers must guarantee pattern fidelity throughout the entire range of nominal process variation and diverse layout. Even though we use general OPC method using single model and recipe, we usually expect to obtain good OPC results and ensure the process margin between different devices in the sub-100nm technology node. OPC Model usually predicts the distortion or behavior of layout through the simulation in the range of measured data. If the layout is out of range from the measured data, or CD difference occurred from the topology issue, we can not improve the OPC accuracy with a single OPC model. In addition, as the design rule has decreased, it is extremely hard to obtain the efficient OPC result only with a single OPC recipe. We can not extract the optimized single OPC recipe which can cover all the various device and layout. Therefore, we can improve the OPC accuracy and reduce the turn around time related to the OPC operation and mask manufacturing in sub-100nm technology node by applying the optimized multi OPC recipes to the device which contains the various patterns like SoC.

Paper Details

Date Published: 20 October 2006
PDF: 12 pages
Proc. SPIE 6349, Photomask Technology 2006, 63494P (20 October 2006); doi: 10.1117/12.686655
Show Author Affiliations
Munhoe Do, Dongbu Electronics (South Korea)
Jaehyun Kang, Dongbu Electronics (South Korea)
Jaeyoung Choi, Dongbu Electronics (South Korea)
Junseok Lee, Dongbu Electronics (South Korea)
Yongsuk Lee, Dongbu Electronics (South Korea)
Keeho Kim, Dongbu Electronics (South Korea)

Published in SPIE Proceedings Vol. 6349:
Photomask Technology 2006
Patrick M. Martin; Robert J. Naber, Editor(s)

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