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Proceedings Paper

Design of Wallace tree multiplier and other components of a quantum ALU using reversible TSG gate
Author(s): Himanshu Thapliyal; M. B. Srinivas
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Paper Abstract

This paper presents the design of a novel modified Wallace tree multiplier, using the reversible TSG gate proposed by the authors earlier. The novelty of the TSG gate is that it can also work singly as a reversible full adder. The TSG gate is also used in this paper to design various other reversible arithmetic and logical components that can be assembled to realize a primitive reversible/quantum ALU. It is also shown that these components are optimal, in terms of number of reversible gates and garbage outputs, compared to other designs existing in literature.

Paper Details

Date Published: 31 May 2006
PDF: 11 pages
Proc. SPIE 6264, Quantum Informatics 2005, 62640H (31 May 2006); doi: 10.1117/12.683126
Show Author Affiliations
Himanshu Thapliyal, International Institute of Information Technology (India)
M. B. Srinivas, International Institute of Information Technology (India)

Published in SPIE Proceedings Vol. 6264:
Quantum Informatics 2005
Yuri I. Ozhigov, Editor(s)

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