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Proceedings Paper

Global pattern density control by resizing fill patterns for CD skew compensation
Author(s): Jae-pil Shin; Jin-sook Choi; Sung-gyu Park; Jong-bae Lee; Moon-hyun Yoo; Jeong-taek Kong
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Paper Abstract

The global pattern density of a mask is a major factor of etch process-induced CD skew. Logic products have different global pattern densities according to the various area portions of SRAM and logic cells. For example, the pattern densities of 66 devices of 130nm node vary from 34% to 47.7% for active layer and from 14.7% to 26.7% for gate poly layer. In order to compensate the global pattern density effect on CD skew, the process condition change is easy to practice for process engineers. But the process condition change for each device increases process variation and reduces process margin. A direct approach to compensate the global density effect on CD skew is necessary. In this paper, we propose a method to make the global pattern density of a mask uniform at the data preparation stage. Our approach is to resize fill patterns to control the global pattern density. We confirmed that the proposed method is effective to control the global pattern densities of masks to a target density within +/- 1%.

Paper Details

Date Published: 20 May 2006
PDF: 6 pages
Proc. SPIE 6283, Photomask and Next-Generation Lithography Mask Technology XIII, 628339 (20 May 2006); doi: 10.1117/12.681828
Show Author Affiliations
Jae-pil Shin, Samsung Electronics Co., Ltd. (South Korea)
Jin-sook Choi, Samsung Electronics Co., Ltd. (South Korea)
Sung-gyu Park, Samsung Electronics Co., Ltd. (South Korea)
Jong-bae Lee, Samsung Electronics Co., Ltd. (South Korea)
Moon-hyun Yoo, Samsung Electronics Co., Ltd. (South Korea)
Jeong-taek Kong, Samsung Electronics Co., Ltd. (South Korea)


Published in SPIE Proceedings Vol. 6283:
Photomask and Next-Generation Lithography Mask Technology XIII
Morihisa Hoga, Editor(s)

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