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Proceedings Paper

New identities and transformations for hardware power operators
Author(s): Romain Michard; Arnaud Tisserand; Nicolas Veyrat-Charvillon
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Paper Abstract

In this work we present some improvements on hardware operators dedicated to the computation of power operations with fixed integer exponent (x3, x4, . . .) in unsigned radix-2 fixed-point or integer representations. The proposed method reduces the number of partial products using simplifications based on new identities and transformations. These simplifications are performed both at the logical and the arithmetic levels. The proposed method has been implemented in a VHDL generator that produces synthesizable descriptions of optimized operators. The results of our method have been demonstrated on FPGA circuits.

Paper Details

Date Published: 25 August 2006
PDF: 10 pages
Proc. SPIE 6313, Advanced Signal Processing Algorithms, Architectures, and Implementations XVI, 631307 (25 August 2006); doi: 10.1117/12.676244
Show Author Affiliations
Romain Michard, École Normale Supérieure de Lyon, CNRS (France)
Arnaud Tisserand, LIRMM, CNRS-UM2 (France)
Nicolas Veyrat-Charvillon, École Normale Supérieure de Lyon, CNRS (France)


Published in SPIE Proceedings Vol. 6313:
Advanced Signal Processing Algorithms, Architectures, and Implementations XVI
Franklin T. Luk, Editor(s)

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