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Proceedings Paper

FPGA cluster for high-performance AO real-time control system
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Paper Abstract

Whilst the high throughput and low latency requirements for the next generation AO real-time control systems have posed a significant challenge to von Neumann architecture processor systems, the Field Programmable Gate Array (FPGA) has emerged as a long term solution with high performance on throughput and excellent predictability on latency. Moreover, FPGA devices have highly capable programmable interfacing, which lead to more highly integrated system. Nevertheless, a single FPGA is still not enough: multiple FPGA devices need to be clustered to perform the required subaperture processing and the reconstruction computation. In an AO real-time control system, the memory bandwidth is often the bottleneck of the system, simply because a vast amount of supporting data, e.g. pixel calibration maps and the reconstruction matrix, need to be accessed within a short period. The cluster, as a general computing architecture, has excellent scalability in processing throughput, memory bandwidth, memory capacity, and communication bandwidth. Problems, such as task distribution, node communication, system verification, are discussed.

Paper Details

Date Published: 27 June 2006
PDF: 9 pages
Proc. SPIE 6272, Advances in Adaptive Optics II, 627240 (27 June 2006); doi: 10.1117/12.671434
Show Author Affiliations
Deli Geng, Durham Univ. (United Kingdom)
Stephen J. Goodsell, Durham Univ. (United Kingdom)
Alastair G. Basden, Durham Univ. (United Kingdom)
Nigel A. Dipper, Durham Univ. (United Kingdom)
Richard M. Myers, Durham Univ. (United Kingdom)
Chris D. Saunter, Durham Univ. (United Kingdom)


Published in SPIE Proceedings Vol. 6272:
Advances in Adaptive Optics II
Brent L. Ellerbroek; Domenico Bonaccini Calia, Editor(s)

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