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Proceedings Paper

Impact of process variation on 65nm across-chip linewidth variation
Author(s): Le Hong; Travis Brist; Pat LaCour; John Sturtevant; Martin Niehoff; Philipp Niedermaier
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Paper Abstract

The latest improvements in process-aware lithography modeling have resulted in improved simulation accuracy through the dose and focus process window. This coupled with the advancements in high speed, full chip grid-based simulation provide a powerful combination for accurate process window simulation. At the 65nm node, gate CD control becomes ever more critical so understanding the amount of CD variation through the full process window is crucial. This paper will use the aforementioned simulation capability to assess the impact of process variation on ACLV (Across-Chip Linewidth Variation) and critical failures at the 65nm node. The impact of focus, exposure, and misalignment errors in manufacturing is explored to quantify both CD control and catastrophic printing failure. It is shown that there is good correlation between predicted and experimental results.

Paper Details

Date Published: 14 March 2006
PDF: 9 pages
Proc. SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV, 61560Q (14 March 2006); doi: 10.1117/12.660541
Show Author Affiliations
Le Hong, Mentor Graphics Corp. (United States)
Travis Brist, Mentor Graphics Corp. (United States)
Pat LaCour, Mentor Graphics Corp. (United States)
John Sturtevant, Mentor Graphics Corp. (United States)
Martin Niehoff, Mentor Graphics Corp. (Germany)
Philipp Niedermaier, Infineon Technologies AG (Germany)


Published in SPIE Proceedings Vol. 6156:
Design and Process Integration for Microelectronic Manufacturing IV
Alfred K. K. Wong; Vivek K. Singh, Editor(s)

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