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Proceedings Paper

Lithography oriented DfM for 65 nm and beyond
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Paper Abstract

As Technology node is advancing, we are forced to use relatively low resolution lithography tool. And these situation results in degradation of pattern fidelity. hot spot, lithographic margin-less spot, appears frequently by conventional design rule methodology. We propose two design rule methodology to manage hot spot appearances in the stage of physical pattern determination. One is restricted design rule, under which pattern variation is very limited, so hot spot generation can be fully controlled. Second is complex design rule combined with lithography compliance check (LCC) and hot spot fixing (HSF). Design rule, by itself, has a limited ability to reduce hot spot generation. To compensate the limited ability, both LCC including optical proximity correction and process simulation for detecting hot spots and HSF for fixing the detected hot spots are required. Implementing those methodology into design environment, hot spot management can be done by early stage of physical pattern determination. Also newly developed tool is introduced to help designers easily fixing hot spots. By using this tool, the system of automatic LCC and HSF has been constructed. hot spots-less physical patterns through this system can be easily obtained and turn-back from manufacture to design can be avoided.

Paper Details

Date Published: 24 March 2006
PDF: 9 pages
Proc. SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV, 61560F (24 March 2006); doi: 10.1117/12.656858
Show Author Affiliations
S. Kyoh, Toshiba Corp., Semiconductor Co. (Japan)
T. Kotani, Toshiba Corp., Semiconductor Co. (Japan)
S. Kobayashi, Toshiba Corp., Semiconductor Co. (Japan)
A. Ikeuchi, Toshiba Corp., Semiconductor Co. (Japan)
S. Inoue, Toshiba Corp., Semiconductor Co. (Japan)


Published in SPIE Proceedings Vol. 6156:
Design and Process Integration for Microelectronic Manufacturing IV
Alfred K. K. Wong; Vivek K. Singh, Editor(s)

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