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Proceedings Paper

New OPC verification method using die-to-database inspection
Author(s): Hyunjo Yang; Jaeseung Choi; Byungug Cho; Jongkyun Hong; Jookyoung Song; Donggyu Yim; Jinwoong Kim; Masahiro Yamamoto
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Paper Abstract

The minimum feature size of new generation memory devices is approaching down to 50 nm era. And a very precise CD control is demanded not only for cell layouts but also for core and peripheral layouts of DRAM devices. However, as NA of lens system grows higher and higher and Resolution Enhancement Techniques (RETs) becomes more and more aggressive, isolated-dense bias increases and process window for the core and peripheral layouts decreases dramatically. So, the burden of OPC increases in proportion and it is requisite to verify as many features as possible on wafer. If possible, it would be desirable to verify all the features in a die. Recently, a novel inspection tool has been developed which can verify all kinds of patterns on wafer based on Die to Database copmarison method. It can identify all the serious systematic defects of nm order size error from the original layout target and feed back the systematic error points to OPC for more accurate model tuning. In addition we can obtain the full field CD distribution diagram of some specific transistors with hundreds of thousands of measurement data. So, we can analyze the root cause of the CD distribution in a field, such as mask CDU or lens aberrations and so on. And we can also perform Process Window Qualification of all the features in a die. In this paper, OPC verification methodology using the new inspection tool will be introduced and the application to the analysis of full field CD distribution and Process Window Qualification will be presented in detail.

Paper Details

Date Published: 24 March 2006
PDF: 9 pages
Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 615232 (24 March 2006); doi: 10.1117/12.656857
Show Author Affiliations
Hyunjo Yang, Hynix Semiconductor Inc. (South Korea)
Jaeseung Choi, Hynix Semiconductor Inc. (South Korea)
Byungug Cho, Hynix Semiconductor Inc. (South Korea)
Jongkyun Hong, Hynix Semiconductor Inc. (South Korea)
Jookyoung Song, Hynix Semiconductor Inc. (South Korea)
Donggyu Yim, Hynix Semiconductor Inc. (South Korea)
Jinwoong Kim, Hynix Semiconductor Inc. (South Korea)
Masahiro Yamamoto, NanoGeometry Research Inc. (Japan)

Published in SPIE Proceedings Vol. 6152:
Metrology, Inspection, and Process Control for Microlithography XX
Chas N. Archie, Editor(s)

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