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Proceedings Paper

LWR reduction in ArF resist pattern by resist smoothing process
Author(s): Yuichiro Inatomi; Tetsu Kawasaki; Mitsuaki Iwashita
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Paper Abstract

With the scaling down of the semiconductor design rule, the requirement to reduce the roughness of the resist pattern used in lithography processing has become crucial. Two typical examples of resist-pattern roughness are line-edge roughness (LER) and line-width roughness (LWR). In particular, as the wavelength of the optical light source has been shortened from 248 nm (KrF source) to 193 nm (ArF source), the problem that LWR is produced with a scaled-down ArF resist pattern has become a cause of deterioration in device characteristics. And with further scaling down in the future, decreasing this LWR on the resist pattern will become a major challenge facing lithography processing. Accordingly, to meet this challenge, it has thus become urgent to find a good method for reducing LWR. At present, for LWR reduction during lithography processing, various measures have been tried and many studies taking different approaches-addressing materials (resist, etc.), exposure technology (mask, etc.), and the track process-have been performed. A decisive method of reducing LWR, however, has not yet been found. Aiming at reducing LWR, we have thus developed a process for treating the post-development resist pattern in an organic-solvent atmosphere. This resist smoothing process is effective method for both Krf resist and Arf resist, moreover it was achieved that VUV pre-treatment improve solvent solubility against resist, especially Arf resist. As a result, the LWR of a resist pattern after undergoing this treatment process was substantially decreased. Moreover, as for the roughness produced during the following etching process for forming the gate electrode, it was confirmed that the effect of decreasing LWR of the resist pattern is carried forward to this next process. In this paper, the developed LWR-reduction method for an ArF ultra-fine pattern is explained, and LWR reduction results achieved with method are presented.

Paper Details

Date Published: 11 April 2006
PDF: 9 pages
Proc. SPIE 6153, Advances in Resist Technology and Processing XXIII, 61533X (11 April 2006); doi: 10.1117/12.656382
Show Author Affiliations
Yuichiro Inatomi, Tokyo Electron AT Ltd. (Japan)
Tetsu Kawasaki, Tokyo Electron AT Ltd. (Japan)
Mitsuaki Iwashita, Tokyo Electron AT Ltd. (Japan)


Published in SPIE Proceedings Vol. 6153:
Advances in Resist Technology and Processing XXIII
Qinghuang Lin, Editor(s)

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