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Proceedings Paper

ArF scanner performance improvement by using track integrated CD optimization
Author(s): Jacky Huang; Shinn-Sheng Yu; Chih-Ming Ke; Timothy Wu; Yu-Hsi Wang; Tsai-Sheng Gau; Dennis Wang; Allen Li; Wenge Yang; Araki Kaoru
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Paper Abstract

In advanced semiconductor processing, shrinking CD is one of the main objectives when moving to the next generation technology. Improving CD uniformity (CDU) with shrinking CD is one of the biggest challenges. From ArF lithography CD error budget analysis, PEB (post exposure bake) contributes more than 40% CD variations. It turns out that hot plate performance such as CD matching and within-plate temperature control play key roles in litho cell wafer per hour (WPH). Traditionally wired or wireless thermal sensor wafers were used to match and optimize hot plates. However, sensor-to-sensor matching and sensor data quality vs. sensor lifetime or sensor thermal history are still unknown. These concerns make sensor wafers more suitable for coarse mean-temperature adjustment. For precise temperature adjustment, especially within-hot-plate temperature uniformity, using CD instead of sensor wafer temperature is a better and more straightforward metrology to calibrate hot plates. In this study, we evaluated TEL clean track integrated optical CD metrology (IM) combined with TEL CD Optimizer (CDO) software to improve 193-nm resist within-wafer and wafer-to-wafer CD uniformity. Within-wafer CD uniformity is mainly affected by the temperature non-uniformity on the PEB hot plate. Based on CD and PEB sensitivity of photo resists, a physical model has been established to control the CD uniformity through fine-tuning PEB temperature settings. CD data collected by track integrated CD metrology was fed into this model, and the adjustment of PEB setting was calculated and executed through track internal APC system. This auto measurement, auto feed forward, auto calibration and auto adjustment system can reduce the engineer key-in error and improve the hot plate calibration cycle time. And this PEB auto calibration system can easily bring hot-plate-to-hot-plate CD matching to within 0.5nm and within-wafer CDU (3σ) to less than 1.5nm.

Paper Details

Date Published: 24 March 2006
PDF: 4 pages
Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 615228 (24 March 2006); doi: 10.1117/12.656104
Show Author Affiliations
Jacky Huang, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Shinn-Sheng Yu, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Chih-Ming Ke, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Timothy Wu, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Yu-Hsi Wang, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Tsai-Sheng Gau, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Dennis Wang, Tokyo Electron Ltd. (Japan)
Allen Li, Tokyo Electron Ltd. (Japan)
Wenge Yang, Tokyo Electron Ltd. (Japan)
Araki Kaoru, Tokyo Electron Ltd. (Japan)


Published in SPIE Proceedings Vol. 6152:
Metrology, Inspection, and Process Control for Microlithography XX
Chas N. Archie, Editor(s)

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