Share Email Print
cover

Proceedings Paper

Comprehensive approach to MuGFET metrology
Author(s): G. F. Lorusso; P. Leray; T. Vandeweyer; M. Ercken; C. Delvaux; I. Pollentier; S. Cheng; N. Collaert; R. Rooyackers; B. Degroote; M. Jurczak; S. Biesemans; O. Richard; H. Bender; A. Azordegan; J. McCormack; S. Shirke; J. Prochazka; T. Long
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

As we move forward to the 45 and 32nm node, MuGFET's (Multi-Gate Field-Effect Transistor) are considered more and more as a necessary alternative to keep pace with Moore's Law. If proven manufacturable, MuGFET's could eventually replace conventional CMOS transistors within a few years. The ability to perform proper and extensive metrology in a production environment is then essential. We investigate here some of the requirements of MuGFET metrology. Accuracy and line width roughness (LWR) metrology will play an essential role, because the small dimension of the features involved. 3D metrology is required when dealing with non-planar devices. Sophisticated check of optical proximity correction (OPC) is needed in order to ensure that the design is respected. We propose here some possible solutions to address the needs of MuGFET metrology in a production-worthy fashion. A procedure to calibrate CDSEM to TEM for accuracy is developed. We performed LWR metrology of fins in a fully automated way by using CDSEM, while the 3D information is obtained by means of scatterometry. Finally, we will discuss the application of design-based metrology (DBM) to MuGFET OPC validation.

Paper Details

Date Published: 24 March 2006
PDF: 9 pages
Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 615219 (24 March 2006); doi: 10.1117/12.656076
Show Author Affiliations
G. F. Lorusso, IMEC (Belgium)
P. Leray, IMEC (Belgium)
T. Vandeweyer, IMEC (Belgium)
M. Ercken, IMEC (Belgium)
C. Delvaux, IMEC (Belgium)
I. Pollentier, IMEC (Belgium)
S. Cheng, IMEC (Belgium)
N. Collaert, IMEC (Belgium)
R. Rooyackers, IMEC (Belgium)
B. Degroote, IMEC (Belgium)
M. Jurczak, IMEC (Belgium)
S. Biesemans, IMEC (Belgium)
O. Richard, IMEC (Belgium)
H. Bender, IMEC (Belgium)
A. Azordegan, KLA-Tencor (United States)
J. McCormack, KLA-Tencor (United States)
S. Shirke, VLSI Standards (United States)
J. Prochazka, VLSI Standards (United States)
T. Long, VLSI Standards (United States)


Published in SPIE Proceedings Vol. 6152:
Metrology, Inspection, and Process Control for Microlithography XX
Chas N. Archie, Editor(s)

© SPIE. Terms of Use
Back to Top