Share Email Print

Proceedings Paper

Improving low-light CMOS performance with four-transistor four-shared pixel architecture and charge-domain binning
Author(s): Failop Chu; R. M. Guidash; J. Compton; S. Coppola; W. Hintz
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

A new architecture found in the KODAK KAC-3100 CMOS Image Sensor has been created to dramatically improve CMOS image performance in mobile applications. The method of operation and implementation is explained and the improvement of performance parameters on image quality is discussed. The benefits of the new architecture are discussed in relation to competitive CMOS technologies used in high-demanding mobile imaging applications today.

Paper Details

Date Published: 21 February 2006
PDF: 9 pages
Proc. SPIE 6069, Digital Photography II, 606903 (21 February 2006); doi: 10.1117/12.641773
Show Author Affiliations
Failop Chu, Eastman Kodak Co. (United States)
R. M. Guidash, Eastman Kodak Co. (United States)
J. Compton, Eastman Kodak Co. (United States)
S. Coppola, Eastman Kodak Co. (United States)
W. Hintz, Eastman Kodak Co. (United States)

Published in SPIE Proceedings Vol. 6069:
Digital Photography II
Nitin Sampat; Jeffrey M. DiCarlo; Russel A. Martin, Editor(s)

© SPIE. Terms of Use
Back to Top