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Proceedings Paper

Modelling and analysis of fringing and metal thickness effects in MEMS parallel plate capacitors
Author(s): Kriyang Shah; Jugdutt Singh; Aladin Zayegh
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Paper Abstract

This paper presents a detailed design and analysis of fringing and metal thickness effects in a Micro Electro Mechanical System (MEMS) parallel plate capacitor. MEMS capacitor is one of the widely deployed components into various applications such are pressure sensor, accelerometers, Voltage Controlled Oscillator's (VCO's) and other tuning circuits. The advantages of MEMS capacitor are miniaturisation, integration with optics, low power consumption and high quality factor for RF circuits. Parallel plate capacitor models found in literature are discussed and the best suitable model for MEMS capacitors is presented. From the equations presented it is found that fringing filed and metal thickness have logarithmic effects on capacitance and depend on width of parallel plates, distance between them and thickness of metal plates. From this analysis a precise model of a MEMS parallel plate capacitor is developed which incorporates the effects of fringing fields and metal thickness. A parallel plate MEMS capacitor has been implemented using Coventor design suite. Finite Element Method (FEM) analysis in Coventorware design suite has been performed to verify the accuracy of the proposed model for suitable range of dimensions for MEMS capacitor Simulations and analysis show that the error between the designed and the simulated values of MEMS capacitor is significantly reduced. Application of the modified model for computing capacitance of a combed device shows that the designed values greatly differ from simulated results noticeably from 1.0339pF to 1.3171pF in case of fringed devices.

Paper Details

Date Published: 5 January 2006
PDF: 9 pages
Proc. SPIE 6035, Microelectronics: Design, Technology, and Packaging II, 603511 (5 January 2006); doi: 10.1117/12.638385
Show Author Affiliations
Kriyang Shah, Victoria Univ. (Australia)
Jugdutt Singh, Victoria Univ. (Australia)
Aladin Zayegh, Victoria Univ. (Australia)


Published in SPIE Proceedings Vol. 6035:
Microelectronics: Design, Technology, and Packaging II
Alex J. Hariz, Editor(s)

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