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Proceedings Paper

DfM requirements and ROI analysis for system-on-chip
Author(s): Artur Balasinski
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Paper Abstract

DfM (Design-for-Manufacturability) has become staple requirement beyond 100 nm technology node for efficient generation of mask data, cost reduction, and optimal circuit performance. Layout pattern has to comply to many requirements pertaining to database structure and complexity, suitability for image enhancement by the optical proximity correction, and mask data pattern density and distribution over the image field. These requirements are of particular complexity for Systems-on-Chip (SoC). A number of macro-, meso-, and microscopic effects such as reticle macroloading, planarization dishing, and pattern bridging or breaking would compromise fab yield, device performance, or both. In order to determine the optimal set of DfM rules applicable to the particular designs, Return-on-Investment and Failure Mode and Effect Analysis (FMEA) are proposed.

Paper Details

Date Published: 4 November 2005
PDF: 8 pages
Proc. SPIE 5992, 25th Annual BACUS Symposium on Photomask Technology, 59920F (4 November 2005); doi: 10.1117/12.632358
Show Author Affiliations
Artur Balasinski, Cypress Semiconductor Corp. (United States)


Published in SPIE Proceedings Vol. 5992:
25th Annual BACUS Symposium on Photomask Technology
J. Tracy Weed; Patrick M. Martin, Editor(s)

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